1. Field of the Invention
The invention relates generally to the semiconductor power devices. More particularly, this invention relates to configurations and methods of manufacturing of semiconductor power devices comprise transistor cells with non-uniform cell characteristics of robustness to protect the slow switching power semiconductor devices for improving the device reliability.
2. Description of the Prior Art
Conventional technologies of manufacturing and configuring semiconductor power devices are still confronted with a technical difficulty that the transistor cells with slower switching speed in the power devices are often vulnerable to over-current damages when the power devices are implemented for switching off an electric connection. Specifically, when an electrical connection is switched on or off and before the operation reaches a steady state, a transient state takes place. In this initial transient state, the switch on or off operations causes a relatively large current and voltage spike. The voltage and current spikes may cause sparks and EMI in the electronic device and may lead to device damages and poor reliability. Certain applications do not require extremely fast switching rates. In these cases, a slow turn-on and turn-off gate signal is often employed to avoid excessively large voltage and current spikes. However this leads to problems that will be explained later.
FIG. 1A is a typical switching circuit implemented for switching on or off the power supply to an electronic device. A slow turning on or turning off operation is achieved by controlling the long rise and fall time of the signal provided to the gate of a semiconductor power device. The slow turning on and turning off of the device avoids excessive transient voltage and current spikes. Unfortunately, in the slow turning on or turning off operations, both high current and high voltage appears across the drain and source during the transition period, which can cause problems under certain conditions shown in FIG. 1B.
A standard power device consists of thousands of transistors working in parallel. However, if the transistors are not all perfectly uniform, as is often the reality, some of the transistors may switch off slower than the others. FIG. 1B shows a similar circuit diagram to FIG. 1B, except that the FIG. 1B categorizes the transistor cells as slow transistors and fast transistors. During the turning on or turning off transitions, not all the transistor cells in the semiconductor power device switch at the same speed. Some transistor cells are turned on or turned off before other transistor cells that have slower switching speed. During a switching off operation, the slower transistor cells often become the vulnerable cells to fail due to the situation that all other faster transistor cells are turned off. The power and current are then focused on a few slower transistor cells. The slower transistor cells are more likely to fail if the voltage and current are beyond the design limits of these transistor cells.
FIG. 1C is a circuit diagram for illustrating the conventional method to protect the circuit against damages caused by the switching transitions. The protective measure against the damages that may occur during the switching transitions is by adding ballast resistors to every transistor cell to improve the current uniformity over all the transistor cells. The conventional techniques of adding ballast resistors to all the transistor cells to improve the current and voltage uniformity however have the disadvantage that the on resistance, Rdson, of the transistors are significantly increased thus degrading the device operation. Adding ballast resistors to all the transistor cells further increases the silicon areas required for manufacturing the power device thus increasing the production costs of the device.
Specifically, the source ballasting techniques have been disclosed in U.S. Pat. Nos. 5,475,252, 5,763,919, 6,268,286, 6,331,726, 6,441,410, 6,583,972, 6,587,320, and 6,927,458. The semiconductor power devices such as MOSFET devices disclosed in these patented inventions implement a technique of uniform ballasting. However, as discussed above, the Rdson is greatly increased and the device performance is adversely affected due to the uniform addition of the source resistance by implementing the conventional ballasting technologies.
Therefore, a need still exists in the art of power semiconductor device design and manufacture to provide new device configurations and methods of manufacturing the power devices such that the above discussed problems and limitations can be resolved.